R&D Senior Hardware Design Engineer
Shanghai
Primary Skills: FPGA coding, Xilinx and Active HDL flow, chipScope, Spartan products
Description:
· At least 5 years hardware design or FPGA coding experience by using VHDL
· Minimum of 6 years industry experience with a background in board-level digital/analog circuit design.
· Rich experience with Xilinx or Active HDL design and verification flow.
· Experience using chipScope.
· Rich experience with static timing using Xilinx UCF
· Setting up high speed SERDES cores.
· Rich experience with a background in board-level digital/analog circuit design
· Rich experience in C/C++ for embedded electronics.
· Experience with Matlab/Simulink tools.
· Must have lab experience using scopes, logic analyzers, etc.
· Good verbal and written communication skills.
Mission:
· Be technical expert for hardware group.
· Overall hardware architecture and hardware development process.
· Lead team and take responsible for developing new hardware designs, including FPGA.
· Overall hardware team technical development and coach team members.
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工作地点：Shanghai
