Server DCG Board Design Engineer
Location: Shanghai
Job Description:
The position focuses on the design and troubleshooting activities of IA-32 volume server motherboards and peripherals. The responsibilities will include but not be limited to:
- Working with architecture and marketing to define the product, design the critical core technologies, and design the server baseboard subsystems;
- Working with other development teams such as BIOS and Chasis to debug the motherboards technical issues, analysis the root cause, and deliver the technical solutions;
- Working as the primary interface for motherboards and peripheral issues between marketing team and other development teams during the design and validation process.
Qualifications
Candidate should possess a Bachelor or Master degree of Electronic Engineering or Computer Engineering with two to five years of experience. Preference will be given to candidates who have experience with digital board design and evaluation, signal integrity, Cadence board design tools and/or have experience determining root causes of tough technical issues. Additional qualifications include:
- Solid understanding of IA-32 platform architecture;
- Strong digital design skills with experience with high speed digital busses such as Peripheral Component Interconnect (PCI), hub link, memory or front side bus;
- Technical experience with digital components, including understanding the application of different logic families;
- Self starter who can work with minimal supervision in a team environment;
- Good verbal and written communication skills, as is a highly disciplined approach to problem solving.
Server DHG Signal Integrity Engineer
Location: Shanghai
Description
The signal integrity engineer applies working knowledge of transmission line theory and electro-magnetic principals to ensure new silicon, package and board designs meeting system timing and signal quality requirements. The signal integrity engineer is a key technical contributor to the development and verification of new system-on-chip silicon for digital television and network media products.
In this position, you will be responsible for performing signal integrity, power delivery, and timing analyses of high speed interfaces and power delivery networks. Your responsibilities will include but not be limited to:
- Defining silicon I/O, package, and PCB layout requirements to ensure an electrically robust design that meets performance and cost targets
- Responsible for actively participate in simulation plan development and scheduling
- Supporting silicon IO, package, board and application engineers throughout the product life cycle
- Generating and maintaining simulation decks and models
- Performing laboratory measurements and correlation to simulation predictions
- Writing documentation to summarize results and recommendations
Qualifications
You should possess a Master of Science or Ph.D. degree in Electrical Engineering or similar degree with three years of relevant experience. Additional qualifications include:
- Proven knowledge in the use of simulation and modeling tools such as HSPICE*, ANSOFT*, Power SI* and PCB SI* to develop signal and power integrity design recommendations
- Practical experience using high-speed test equipment, including VNAs, TDRs, and oscilloscopes to correlate simulation analysis results and predictions to actual system performance
- Understanding of the package and PCB design processes
- Excellent communication skills, both written and verbal, coupled with the ability to work independently and in a team environment
- Experience in the electrical analysis and design of high-speed interconnects for technology interfaces such as DDR3, SATA, HDMI, PCI-e and USB*
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工作地点：Shanghai
